Enzian is a research computer built by the Systems Group at ETH Zurich.
As a research computer, Enzian is designed for computer systems software research and deliberately over-engineered. Enzian has a big server-class CPU closely coupled to a large FPGA, with ample main memory and network bandwidth on both sides.
As we explained in our post about the Enzian rear panel there are two client USB ports on Enzian: one for the JTAG scain chain and one for the system UARTs. The JTAG chip on the Enzian main board has a pre-configured JTAG cable ID that is unique. The serial-to-USB converter by default does not have a unique ID though. If you just plug one Enzian into your machine that does not matter, however we have 9 of these machines all plugged into our gateway server.
How do we connect our Enzian machines to ensure that they can utilize the entire bandwith that they are provisioned with? Using big switches!
Our poster on recent Enzian work has been accepted at OSDI 2022! The OSDI 2022 poster session is from 18:30-20:00 on Monday 11 July, 2022. If you’re going to be at OSDI/ATC, please stop by and we can talk about new and exciting developments in person! We’ll update this post with a final version of the poster when it is available.
We built Enzian to have a platform for our research into operating systems, databases, hardware acceleration, machine learning, networking, and high-performance computing, and because there was nothing comparable out there that we could get hold of otherwise.
Now that it works, we’d like to make Enzian systems available to the rest of the research community. If you want to work with Enzian, or if you might be able to help us make it more widely available, please contact us!