ASPLOS paper accepted!

We’re delighted to announce that our paper on the design of Enzian has been accepted (subject to final shepherding) to the 27th ACM Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), to be held (hopefully) in Lausanne next month!

ASPLOS paper

In the paper, we motivate the problem that Enzian is trying to address, as a computer built for research and therefore optimized for

  • coverage (i.e., it should be able to do what most of the existing platforms used for CPU/FPGA research can do), and
  • performance (i.e., it should be fast enough to do relevant research on modern workloads at scale).

We also talk about the design principles which have guided the project from the beginning:

  • Don’t worry too much about unit cost
  • If in doubt, overengineer
  • Favor bandwidth over capacity
  • Avoid the limitations of standards
  • Instrument as much as possible
  • Don’t just think in single units

The evaluation shows that, not only is Enzian fast (actually, rather better than we had hoped for!), it does indeed achieve coverage: we can support pretty much all the existing research use-cases of other platforms, with equivalent performance, on a single system.

We’re also going for all three of the artifact evaluation badges:

  • Artifact available
  • Artifact evaluated - functional
  • Results reproduced

This is a bit of a challenge for a piece of hardware, but we’re fairly confident we can pull it off, given remote access to the operational Enzian machines by the Artifact Evaluation committee.

Together with getting the first 9 systems running, this a pretty big milestone for us, and we’re proud of the paper. We’ll post it as soon as we get approval from ASPLOS.