Who are we?
Current group members:
Team lead, board design coordination, early board design, low-level ECI implementation, debug and trace infrastructure, lots of soldering.
Barrelfish, Linux, and FreeBSD OS bringup, BMC software lead
Cache coherence implementation
FPGA Shell design and implementation
Dataflow acceleration usecases
Power management software
Circuit testing, fabrication, power management, benchmarking
Cedric Heimhofer
SEL4 on the BMC
Kristina Martšenko
System power and performance modeling, benchmarking
Patrick Wicki
Platform visualization and monitoring
Alumni
Trace processing, software emulation, Barrelfish bringup
Joel Busch
Detailed ECI cache simulation in ARM FAST models
Alain Denzler
Memory controller feasibility study
Application use cases
Alexander Hedges
Simulation environment
FPGA network stack and doughnut prototyping
Tom Kuchler
Hardware protocol analysis and filtering for ECI
Infrastructure and Verilog hacking
Interconnect protocol specification and modelling
ARM FAST models ECI cache simulator
Jakob Meier
Automated ECI trace analysis
ECI link bringup
Pirmin Schmidt
Runtime verification on FPGAs
Jasmin Schult
Formal BMC firmware specification and
synthesis of power sequencing
FPGA network implementation
DDR4 controllers and doughnut prototyping
Patrick Ziegler
Hardware simulator integration
Industry partners
Marvell
Xilinx
DreamChip
Other sponsors
HP Enterprise
VMware
ARM Ltd