Enzian tech nuggets
Interesting technical details about Enzian.
As we’ve said many times, a key feature of Enzian as a research computer is the low-level access to the cache coherency protocol, which in our case is the native inter-socket protocol implemented by the ThunderX-1 CPU.
The role of cache coherency in Enzian is interesting to think about. Consider a typical two-socket NUMA machine (such as the kind of system that the ThunderX-1 processor was designed for):
Testing the assembled, non-functional Enzian board for signal integrity turned out to be rather more work than we expected, much of it involving machining bits of metal – real hardware.
We posted pictures of the first test PCBs back in August. Dream Chip sent two of these for assembly to see if they worked - a couple of issues had already been identified but they weren’t necessarily critical.